(1) Field of the Invention
This invention relates to an A/D converter and, more particularly, to an interpolative A/D converter in which the difference between the analog input signal and a local D/A converted signal is integrated, the integrated analog signal is quantized using comparators into a digital signal, and the digital signal is integrated to yield the digital output signal and at the same time provide the local D/A converted signal.
(2) Description of the Prior Art
An interpolative A/D converter takes advantage of accurate A/D conversion using a relatively simple circuit arrangement. However, when the input signal level varies at a high rate to create an increasing difference from the local D/A converted signal (approximate feedback signal), the difference between the integrated value and the quantized level increases, resulting in a problem of "over slope". To cope with this problem a nonlinear interpolative A/D converter is known in which the quantization level of the comparator is varied exponentially in response to the analog input level, as disclosed in U.S. Pat. No. 3,932,864 by James Charles Candy. This nonlinear interpolative A/D converter, with the quantized feedback signal level varying exponentially, unfavorably has the quantization noise power of the signal greatly dependent on the input signal level. Namely, when the A/D converter is given an input offset voltage, which acts apparently as an increased input signal level, the quantization noise power increases, resulting in the impairment of the S/N ratio. A conceivable method to overcome this problem is the provision of a high-pass filter for eliminating the offset voltage in front of the A/D converter. However, the filter needs to have a low cutoff frequency so that the attenuation of the audio band signal above 300 Hz is negligibly small, requiring a large capacitance and resistance for the components, and it is extremely difficult for the A/D converter to be fabricated in LSI.
Also known is an interpolative A/D converter intended to get rid of a great dependency of the quantization noise power on the input level by linearizing the feedback signal, as described in the Proceedings of the National Convention of the Institute of Electronics and Communication Engineerings of Japan, 1984. This A/D converter produces a feedback signal through the application of the comparator output to the analog integration circuit through the 1-bit D/A converter and attenuator, and accurate A/D conversion is implemented by averaging the comparator output in a digital manner. The approximate feedback analog signal is quantized by a constant parameter independent of the input signal level, whereby the quantization noise power is made constant. The linear interpolative A/D converter, however, needs to have a sufficiently high sampling frequency in order to avoid the over slope distortion, e.g., a sampling frequency of 2 MHz or above is required for the input signal with a bandwidth of 4 kHz or less.
When it is intended to fabricate the above A/D converter in LSI, there arise problems of increased clock noise and power dissipation of operational amplifiers due to the fast operation at 2 MHz. In addition, when MOS transistors, which are common in LSI fabrication, are used to form the analog integration circuit and feedback circuit, clock feedthrough noise voltages created by the switches and an offset voltage created by the 1-bit D/A converter are integrated by the integrator, resulting eventually in a significant offset voltage level, and therefore it will be difficult for the device to implement accurate A/D conversion which meets a stringent specification on the S/N ratio (e.g., 90 dB) as required, for example, by digital switching systems.